N895609510K N895609010R E32OUT N895609100P

Description

N895609510K N895609010R E32OUT N895609100P

N895609510K N895609010R E32OUT N895609100P

The MRAM bit units based on magnetoresistance need to be distributed on a mutually perpendicular double layer wire grid (Figure 1). The upper wire is called a bit line, and the lower wire is called a character line. Due to the need to pass through the top and bottom plates of the unit without truly touching them, the vertical distance between the bit lines and the word lines needs to be slightly greater than the height of the MRAM bit unit itself. The MRAM bit unit is sandwiched between two layers of lines, horizontally positioned at each intersection. In order to read a bit of information, the current will flow through the corresponding bottom line and flow upwards along the selected unit, while the logic circuit will sense the corresponding current on the connected top line. Writing is achieved by applying power to the appropriate word line while allowing current to flow through the bit line. The current either forms an aligned direction (write 0) or an anti aligned state (write 1).

MHD112C-024-PG0-RN
MHD112B-048-PP0-BN
MHD112B-048-PP1-BN
MHD112B-024-NP1-BN
MHD112B-048-PP0-AN
MHD112A-024-PG1-AN
MHD112B-058-PG1-BN
MHD112B-048-PG0-BN
MHD112C-024-NP3-BN
MHD112D-027-NG3-BN
MHD112A-024-PP0-AN
MHD112D-027-PP3-AN
MHD112A-024-PG0-AN
MHD112B-048-NG0-AN
MHD112C-024-NP0-AN
MHD112D-027-NP0-LN