Abstract: An embedded terminal platform was constructed on the existing PSTN network, which is based on the RISC architecture ARM processor S3C2440A and complies with the International Telecommunication Union (ITU) ITU-T H.324 protocol. This system platform proposes a video phone platform based solely on RISC architecture for ARM processors, based on the existing MCU+ASIC architecture or MCU+DSP architecture, which is more flexible. The video phone designed using this solution can be used in existing office, home, and other environments. This article introduces the structure and implementation method of the system.

Introduction

For Chinese people who value family and friendship, video phone is the long-awaited communication method for ordinary people. Video phone is a product that integrates communication technology, computer technology, audio and video processing technology, and is the direction of information technology development. At present, there are two main types of video phones in terms of product types: one is PC based video phones; Another type is an integrated video phone that is detached from the PC; From the perspective of signal transmission lines, there are mainly broadband video phones based on ISDN, ADSL, and narrowband video phones based on PSTN. PSTN has been developed in China for decades and is currently the most widely covered, economical, and widely based communication network among the masses. Therefore, implementing a simple and easy to promote video phone on PSTN networks still has strong practical significance.

The standard for PSTN based videophones in China is based on ITU-T H.324. At present, all IS410STAIS2A IS400STAIS2AED video phones on the market basically use MCU+dedicated ASIC chips to achieve the audio and video encoding and protocol control required by the H.324 protocol, or the solution of processor+DSP architecture, with complex system composition. This article proposes a new wireless video phone based on RISC architecture embedded platform, achieving a simple system composition. This solution can develop independent video phone terminals and can be used in communication, monitoring and other fields.

H.IS410STAIS2A IS400STAIS2AEDProtocol Introduction

Figure 1 is a block diagram of the H.324 protocol, with the suggested H.324 protocol range shown in the box. The recommended content mainly includes H.263/H.261 video encoding and decoding protocol, G.723 audio encoding and decoding protocol, V.14 data protocol, H.223 multiplexing/demultiplexing protocol, H.245 control protocol, and modem (control protocol), etc. Please refer to reference [1]

Figure 1 H.324 Protocol Block Diagram

Figure 1 H.324 Protocol Block Diagram

The transmission of low bit rate audio and video information on PSTN networks requires compression encoding. In the H.324 protocol, audio and video encoding and decoding is one of the core contents. H.263 is defined by ITU and supports video encoding and decoding for video conferencing and video calling applications. H. 263 is based on H.261 encoding and is specifically designed for low bit rate video encoding. It can transmit video streams with a minimum bandwidth of 20K to 24Kbit/sec. G. 723.1 is a dual rate speech encoding and decoding standard developed by the ITU organization for voice signals with telephone bandwidth, capable of transmitting audio streams at a minimum rate of 5.3Kbps.

3. Hardware platform composition based on ARM processor S3C2440A system

Figure 2 System Hardware Architecture

Figure 2 System Hardware Architecture

The overall hardware architecture diagram is shown in Figure 2.

(1) The core of the system is the ARM processor S3C2440 based on RISC architecture. This processor is a 16/32-bit RISC small high-performance microprocessor launched by Samsung Electronics in South Korea. Adopting the ARM920T core with a maximum speed of 533MHz, it can provide various functions for ordinary system peripherals, so there is no need to add additional components. While reducing system complexity, it provides end users with additional devices such as Camera interface, TFT and STN LCD display functions, and SD/MMC/SDIO card slots. This processor has powerful performance and can meet the operational requirements of H.263 encoding and decoding as well as G.723.1 encoding and decoding. Please refer to reference [9].

(2) The video capture part of the system uses a 300000 pixel CMOS Camera OV9650ESL. This device can capture up to 1280 * 1024 pixel arrays, which is sufficient to meet the system’s requirements. Utilize the S3C2440A proprietary Camera controller to collect video data, and use the IIC bus to configure parameters such as exposure time and white balance.

(3) The display part of the system adopts LG’s 3.5-inch 65K color TFT LCD screen, which has a resolution of 320 * 240, meeting the system requirements. In this design, the LCD data interface of the processor is used to configure the display format of the LCD screen, and SDRAM is used as the display storage area. The S3C2440A integrated LCD controller is used to output and display the LCD screen.

(4) The audio input and output part of the system adopts the Codec chip UDA1341, which integrates ADC and DAC internally. The audio collection and playback functions of the system are formed by connecting MIC and SPEAKER. The chip transmits data to the CPU through the IIS bus and can set its collection rate, gain, etc. through L3-BUS.

(5) Interface with PSTN network: In order to achieve data transmission on the PSTN network, following the H.324 protocol, Conexant’s CX06833 is used. This chip is connected to the CPU through the UART interface and provides a PSTN network interface. Please refer to reference [10]

(6) System storage part: The memory adopts SDRAM model IS42S32200, with a chip capacity of 8MBYTE, used to run software systems. The program storage adopts SST39VF320X, which is a NOR type FLASH used for storing programs, with a capacity of 4MBYTE

(7) Attachment: including 4 * 4 keyboards and LED display for working status.