Abstract: Abstract: This article introduces the design scheme of a high-speed real-time data acquisition system. This plan first briefly introduces the characteristics and firmware program of the CYUSB3014 chip, amplifies and filters the sensor output signal, and then converts it into a digital signal. After FIFO caching, use USB burst transmission mode to transfer to the computer. Practice has proven that the system meets the expected design requirements, greatly improves data transmission speed, and enhances real-time performance, which can meet the requirements of high-speed real-time data collection. Introduction: Currently, USB has been widely used in data acquisition systems, and now

Abstract: This article introduces a design scheme for a high-speed real-time data acquisition system. This plan first briefly introduces the characteristics and firmware program of the CYUSB3014 chip, amplifies and filters the sensor output signal, and then converts it into a digital signal. After FIFO caching, use USB burst transmission mode to transfer to the computer. Practice has proven that the system meets the expected design requirements, greatly improves data transmission speed, and enhances real-time performance, which can meet the requirements of high-speed real-time data collection.

Introduction

At present, USB has been widely used in data acquisition systems, and the USB 2.0 specification is currently widely used. With the continuous improvement of testing and measurement requirements, USB 2.0 has gradually become difficult to meet. The new USB 3.0 specification effectively addresses some of the limitations in USB 2.0 and is very suitable for modern testing and measurement systems.

Performance and limitations of USB 2.0

Universal Serial Bus (USB) is currently a widely used system bus, widely used in the field of testing and measurement. The most widely used currently is the USB2.0 standard, which has a maximum communication rate of 480Mbps. However, the USB2.0 standard also has the following shortcomings:

1) Half duplex communication

USB2.0 adopts half duplex communication, and can only transmit data in one direction at a time, which is often difficult to meet the requirements in situations where bidirectional high-speed data transmission is required.

2) Host scheduling required

The USB2.0 standard adopts a master-slave structure in transmission scheduling, which requires the computer to first initiate an IN Token or OUT Token before USB devices can perform data transmission. After a data transmission is completed, it must wait for the next Token, greatly restricting the real-time performance of data transmission.

3) Communication speed is not high compared to competitors

USB has competitors such as 1394 and eSATA, and the newer 1394b standard has a data transfer speed of 800Mbps, almost twice that of USB2.0 HS. And eSATA has a higher data transfer speed.

Introduction to the 2 USB 3.0 SS (SuperSpeed) Standard

In order to enhance the performance and competitiveness of USB, the USB Alliance has launched a new USB 3.0SS (SuperSpeed) standard. This standard uses two differential links to achieve full duplex communication, with a speed of 5.0Gps, which is not only higher than the 1394b standard, but also competitive compared to eSATA.

USB3.0 has added 2 pairs of differential links on the basis of 2.0, specifically for transmitting SS differential signals. The mechanical characteristics of the host side interface are compatible with USB 2.0, while a new interface form is used on the device side to accommodate the addition of two pairs of differential signal lines. The B-type connector of the USB 2.0 interface can be inserted into the device end of USB 3.0, and the device is working in USB 2.0 mode; But the B-type connector of USB 3.0 cannot be inserted into the device end of USB 2.0.

In addition, the bus power supply capacity of USB 3.0 reaches 1A, making it suitable for devices with high power consumption such as portable hard drives without the need for an external power supply.

Introduction to CYUSB3014 Chip

CYUSB3014 is a USB 3.0 controller produced by Cypress, a leading company in the USB industry. This controller integrates a 200MHz ARM9 controller, 512K bytes of RAM, and USB 3.0 physical layer, with a programmable 100MHz GPIF II interface.

Figure 1 is the logical block diagram of the chip. This chip can be used in multiple fields such as digital cameras, data acquisition, and testing and measurement equipment.

 

4 System Hardware Design

In this system, a piece of AD6644 is used for data conversion. This is a 14 bit high-speed ADC produced by AnalogDevice company, with a maximum sampling rate of 40Msps

The functional block diagram of the entire system is shown in Figure 2.

 

In the figure, the sensor converts external signals into electrical signals; The amplification and filtering part amplifies and filters the weak electrical signal output by the sensor to remove external interference; AD6644 collects and converts amplified and filtered signals under the control of FPGA; The FPGA reads the AD output and writes the data into the internal FIFO of the chip according to the GPIF II interface specification of CYUSB3014. In addition, the FPGA can also adjust the amplification and filtering circuit parameters based on the current signal characteristics to obtain better signal-to-noise ratio.

5 GPIF II Interface and FPGA Program Design

The data transfer speed between FPGA and CYUSB3014 is the key to determining the performance of the entire hardware system. Cypress has designed a programmable GPIF-II interface based on GPIF, which can work in master or slave mode, supports 32-bit data bus, and has a maximum interface frequency of 100MHz, with two timing options: asynchronous and synchronous. In this system, in order to achieve higher data transmission efficiency, corresponding FPGA programs were written based on the GPIF-II interface timing, achieving high-speed data transmission between FPGA and CYUSB3014. The actual test results show that the data transmission speed between FPGA and CYUSB3014 can reach up to 200Mbytes/s, fully meeting the requirements of this system. The following is a partial code for the data transmission state machine:

 

6 USB firmware design

CYUSB3014 integrates an ARM9 core processor to complete USB initialization, enumeration, data transfer management, and other tasks. The firmware development uses an open-source gcc compiler and Eclipse integrated development environment. The following is the partial code used to manage data transfer:

 

7. Upper computer driver and software design

Cypress provides a driver module based on WDF, which is a driver development framework promoted by Microsoft to replace the previous WDM framework. The WDF framework encapsulates and inherits WDM. Compared with WDM, the driver development of the WDF framework is simpler and more convenient, especially simplifying the workload of power management and PNP (Plug and Play). According to the actual needs of the system, the driver code has been modified and an application program has been written, which can stably and reliably collect data, indicating that the system meets the expected design requirements.

8 Conclusion

The design scheme of the high-speed real-time data acquisition system in this article, RET670 1MRK002816-AB, first amplifies and filters the sensor output signal, and then converts it into a digital signal. Practice has proven that USB 3.0 greatly improves data transfer speed and enhances real-time performance on the basis of USB 2.0. It can meet the requirements of high-speed real-time data collection and will undoubtedly demonstrate its expertise in the fields of data collection and testing measurement.