IC693ACC323B Shift Register

IC693ACC323B

Main Advantages
Supports high speed counting up to 1MHz
Reversible counting direction
Integrated digital output
Direct connection to incremental encoders
Galvanic isolation from the backplane bus

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Description

IC693ACC323B Shift Register


The ladder program programmed by IC693ACC323B using the shift register instruction is shown in Fig. 8, which shows the operation of shifting WR0 left by 1 bit, and whether the data shifted in is 0 or 1 is determined by the state of R0, the shift trigger signal is X0, and the normally open contact of the reset signal R1.

IC693ACC323B When SB is pressed for the 1st time, X0 is turned on, and since the normally closed contact of R0 (bit 0 of WR) is closed at first, a signal is input to the SR WR0 end of the shift register, and 1 is shifted into R0, and the normally open contact of R0 is closed, and the coil of Y0 is turned on, and at the same time, the normally closed contact of R0 is disconnected; when SB is pressed for the 2nd time, X0 is turned on, and a signal is input to the SR WR0 end of the left shift register. Input signal, SR WR0 left shift one bit, 1 is shifted into R1, due to R0’s normally closed contact is open, 0 is shifted into R0, R0 reset, Y0’s coil is disconnected, R1’s normally open contact is closed, WR0’s 16-bit relay state is all 0, at this time, the circuit to restore the initial state, ready for the next start.